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PD-91816B
SMPS MOSFET
IRFIB5N65A
HEXFET(R) Power MOSFET
Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l High Voltage Isolation = 2.5KVRMS Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current
VDSS
650V
RDS(on) max
0.93
ID
5.1A
TO-220 Full-Pak
GDS
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
5.1 3.2 21 60 0.48 30 2.8 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topologies
l l
Single Transistor Flyback Single Transistor Forward
Notes
through are on page 8
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1
6/21/00
IRFIB5N65A
Static @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units Conditions 650 --- --- V VGS = 0V, I D = 250A --- 0.67 --- V/C Reference to 25C, ID = 1mA --- --- 0.93 VGS = 10V, ID = 3.1.A 2.0 --- 4.0 V VDS = VGS, ID = 250A --- --- 25 VDS = 650V, VGS = 0V A --- --- 250 VDS = 520V, VGS = 0V, T J = 125C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 3.9 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 14 20 34 18 1417 177 7.0 1912 48 84 Max. Units Conditions --- S VDS = 50V, ID = 3.1A 48 ID = 5.2A 12 nC VDS = 400V 19 VGS = 10V, See Fig. 6 and 13 --- VDD = 325V --- ID = 5.2A ns --- RG = 9.1 --- RD = 62,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 520V, = 1.0MHz --- VGS = 0V, VDS = 0V to 520V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
325 5.2 6
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Typ.
--- ---
Max.
2.1 65
Units
C/W
Diode Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 5.2 showing the A G integral reverse --- --- 21 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 5.2A, VGS = 0V --- 493 739 ns TJ = 25C, IF = 5.2A --- 2.1 3.2 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFIB5N65A
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
10
4.5V
1
1
0.1 0.1
4.5V TJ = 25 C
1 10
20s PULSE WIDTH
0.1 100 1 10
20s PULSE WIDTH TJ = 150 C
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
ID = 5.2A
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
2.5
10
2.0
TJ = 150 C
1.5
TJ = 25 C
1
1.0
0.5
0.1 4.0
V DS = 100V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFIB5N65A
2000
VGS , Gate-to-Source Voltage (V)
1600
V GS C is s C rss C oss
= = = =
0V, f = 1M Hz C g s + C g d , Cd s S H O R T E D C gd C ds + C gd
20
ID = 5.2A VDS = 400V 520V VDS = 325V VDS = 130V
16
C , C a pa c itan c e (p F )
C is s
1200
12
C oss
800
8
400
4
C rs s
0 1 10 100 1000
A
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40 50
V D S , D rain-to-S ource V oltage (V )
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD , Reverse Drain Current (A)
10us
I D , Drain Current (A)
10
10 100us
TJ = 150 C
1ms 1 10ms
1
TJ = 25 C V GS = 0 V
0.4 0.6 0.8 1.0 1.2
0.1 0.2
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFIB5N65A
6.0
VDS VGS RG
RD
5.0
D.U.T.
+
I D , Drain Current (A)
4.0
-VDD
10V
3.0
Pulse Width 1 s Duty Factor 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
VDS 90%
1.0
0.0 25 50 75 100 125 150
TC , Case Temperature
( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50
0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 10 P DM t1 t2
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFIB5N65A
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
800
TOP BOTTOM
600
VDS
L
D R IV E R
ID 2.3A 3.3A 5.2A
RG
20V tp
D .U .T
IA S
+ V - DD
A
400
0 .0 1
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
200
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
IAS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
V D S av , A valanc he V oltage (V )
800
780
Charge
760
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
740
50K 12V .2F .3F
720
D.U.T. VGS
3mA
+ V - DS
700 0 1 2 3 4 5 6
A
I av , A valanche C urrent (A )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRFIB5N65A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFIB5N65A
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
1 0.60 (.4 17 ) 1 0.40 (.4 09 ) o 3 .40 (.13 3) 3 .10 (.12 3) -A 3 .70 (.14 5) 3 .20 (.12 6) 7.1 0 ( .28 0) 6.7 0 ( .26 3) 4.8 0 ( .189 ) 4.6 0 ( .181 )
2.8 0 ( .11 0) 2.6 0 ( .10 2) LE A D A S S IG N M E N TS 1 - GATE 2 - D R A IN 3 - S OU R CE N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 14.5 M , 1 9 82
1 6.0 0 ( .63 0) 1 5.8 0 ( .62 2)
1.1 5 ( .04 5) M IN . 1 2 3
2 C O N TR O LL IN G D IM E N S IO N : IN C H . 3.30 (.1 30 ) 3.10 (.1 22 ) -B1 3.7 0 ( .54 0) 1 3.5 0 ( .53 0) C A 3X 1 .4 0 (.05 5) 1 .0 5 (.04 2) 0.9 0 ( .0 35) 3X 0.7 0 ( .0 28) 0.2 5 ( .01 0) 2 .54 (.1 00 ) 2X M AM B 3X 0.48 ( .01 9) 0.44 ( .01 7) D
B
2 .85 ( .11 2) 2 .65 ( .10 4)
M IN IM U M C R E E P A G E D IS T A N C E B E TW E E N A -B -C -D = 4 .80 (.1 89)
TO-220 Full-Pak Part Marking Information
E X AM P LE : TH IS IS A N IR F I8 40 G W IT H AS S E M B L Y L O T C O D E E 40 1
A
IN T E R N A TIO N A L R E C T IF IE R LOGO A S S EM BL Y LOT CODE
PA R T NU M B E R IR F I8 4 0 G
E 40 1 9 2 4 5
Notes:
DATE CODE (YY W W ) YY = YE A R W W = W EEK
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS t=60s, f=60Hz
Starting TJ = 25C, L = 24mH
RG = 25, IAS = 5.2A. (See Figure 12)
ISD 5.2A, di/dt 90A/s, VDD V(BR)DSS,
TJ 150C
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8
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